Enhanced SoC Design via Adaptive Topology Optimization with Reinforcement Learning
dev.to·23h·
Discuss: DEV
🧩RISC-V
Three ways formally verified code can go wrong in practice
buttondown.com·9h
📜Proof Carrying Code
Nov 15 2025 : Intro to Soldering Workshop: Make an LED Tile
nycresistor.com·30m
⚙️DIY Electronics
Trillion-Scale Goldbach Verification on Consumer Hardware -novel Algorithm [pdf]
zenodo.org·1d·
Discuss: Hacker News
🔢Reed-Solomon Math
Neuro-Symbolic AI
en.wikipedia.org·12h·
Discuss: Hacker News
🔲Cellular Automata
Announcing coreboot 25.09 release
blogs.coreboot.org·2h
🔌Operating system internals
A Function Generator From The Past
hackaday.com·7h
Circuit Archaeology
Experimenting with ACL2 and Claude Code
mikedodds.org·14h·
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👑Isabelle
PCBs and parts are on hand - beginning construction of new 1130MRAM board
rescue1130.blogspot.com·1d·
⚙️DIY Electronics
Explicit Lossless Vertex Expanders!
gilkalai.wordpress.com·16h
💎Information Crystallography
Who Invented the Johnson Decade Counter (and Why)?
eejournal.com·2d·
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Homebrew CPUs
Cactus Language • Semantics 3
inquiryintoinquiry.com·10h
🔢Denotational Semantics
GNN Predictions: Hidden Bugs and the Verification Nightmare by Arvind Sundararajan
dev.to·4h·
Discuss: DEV
⚙️Proof Engineering
The CV-1000 returns, but at what cost?
nicole.express·23h
🕹️Retro Gaming
Building the Reasoning Engine at Axiom
axiommath.ai·6h·
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⚔️Lean Tactics
Progress being made in porting AMD OpenSIL Turin PoC to Coreboot in a Gigabyte MZ33-AR1
blog.3mdeb.com·6h·
🖥️Terminal Renaissance
Michael Kohn - tin can phone modem
mikekohn.net·9h
🧪Cassette Hacks
Hardware Vulnerability Allows Attackers to Hack AI Training Data – NC State News
news.ncsu.edu·5h·
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🔐RISC-V Cryptography
SPAD: Specialized Prefill and Decode Hardware for Disaggregated LLM Inference
arxiv.org·22h·
Discuss: r/LLM
💻Local LLMs