Skip to main content
Scour
Browse
Getting Started
Login
Sign Up
You are offline. Trying to reconnect...
Close
Copied to clipboard
Close
Unable to share or copy to clipboard
Close
🔁 Cache Coherence
Multi-Core, Memory Models, MESI Protocol, CPU Architecture
Filter Results
Timeframe
Fresh
Past Hour
Today
This Week
This Month
Feeds to Scour
Subscribed
All
Scoured
5817
posts in
13.4
ms
Principles of
Mechanical
Sympathy
🧠
Memory Models
martinfowler.com
·
1d
·
Hacker News
DAXFS
: A Lock-Free Shared Filesystem for CXL
Disaggregated
Memory
🗃️
SQLite
arxiv.org
·
6d
·
Hacker News
Show HN: User-Friendly
Persistent
AI Memory
Layer
🏗️
AI Infrastructure
reflectmemory.com
·
1d
·
Hacker News
How Much
Linear
Memory Access Is
Enough
?
💾
Cache Optimization
solidean.com
·
20h
·
Lobsters
,
Hacker News
A New Era For
Co-Processing
⚡
Hardware Acceleration
semiengineering.com
·
2h
Algorithms
for Modern
Hardware
⚙️
Performance Profiling
en.algorithmica.org
·
2h
·
Hacker News
Tailslayer
: A technique for reducing tail latency in
DRAM
operations
💾
Cache Optimization
youtube.com
·
15h
·
Lobsters
hamtun24/openuma
: Unified Memory Abstraction Layer for AI Inference on AMD APUs and Intel iGPUs
⚙️
Performance Profiling
github.com
·
5d
·
Hacker News
Investigating Split
Locks
on
x86-64
⚙️
CPU Microarchitecture
chipsandcheese.com
·
1d
·
Hacker News
Runahead
Execution vs. Conventional Data Prefetching in the IBM
POWER6
Microprocessor (2010)
⚙️
Performance Profiling
pages.cs.wisc.edu
·
3h
·
Lobsters
PiTorch
: ML on
Baremetal
Raspberry Pis
💪
ARM Architecture
masonjwang.com
·
14h
·
Hacker News
Show HN:
Benchmark
multiple LLMs to
compare
quality, speed, and cost
⚙️
Performance Profiling
loopthink.ai
·
15h
·
Hacker News
Better MoE model inference with
warp
decode
🏗
Computer Architecture
cursor.com
·
2d
·
Hacker News
Linear Time Complexity in
Fano
Driven
E8
Reductions
🔢
Homomorphic Encryption
zenodo.org
·
3d
·
Hacker News
Powerful
Multicompute
🌡️
Liquid Cooling
volatco.github.io
·
12h
·
Hacker News
Fitting
Gemma
4 (~52 GB) into 12 GB
📋
Zero-Copy
varjosoft.com
·
1d
·
Hacker News
John
Mashey
on
64-bit
computing (1991)
⚙
Risc-v
bourguet.org
·
7h
·
Lobsters
Radial
Priority Indexing: A Self-Correcting Vector Memory for
NPCs
🧠
Memory Models
heydaytime.net
·
2d
·
Hacker News
14sea/Cyclone
_
CRAM
_Mapper: A physical-aware routing codec for Intel Cyclone IV FPGAs.
🧩
RISC-V
github.com
·
3d
·
Hacker News
DRAM
Memory
Refresh
🧠
Memory Models
en.wikipedia.org
·
1d
·
Hacker News
Loading...
Loading more...
Page 2 »
Keyboard Shortcuts
Navigation
Next / previous item
j
/
k
Open post
o
or
Enter
Preview post
v
Post Actions
Love post
a
Like post
l
Dislike post
d
Undo reaction
u
Save / unsave
s
Recommendations
Add interest / feed
Enter
Not interested
x
Go to
Home
g
h
Interests
g
i
Feeds
g
f
Likes
g
l
History
g
y
Changelog
g
c
Settings
g
s
Browse
g
b
Search
/
Pagination
Next page
n
Previous page
p
General
Show this help
?
Submit feedback
!
Close modal / unfocus
Esc
Press
?
anytime to show this help