microkernel, L4, Mach, IPC latency, minimal kernel, RISC-V kernel
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π§ Systems & Infrastructure
microkernel design, L4, seL4, IPC, capability-based kernel
microgrid, islanded grid, microgrid control, distributed generation, campus microgrid
microgrid, distributed energy, islanded grid, off-grid power
CPU microcode, microcode update, x86 microcode, firmware patch
Short Form Content, Personal Broadcasting, Status Updates, Quick Publishing
Short Posts, Status Updates, Social Web, ActivityPub
micro-batch processing, batching strategies, pipeline throughput, latency tradeoff
MFENCE, SFENCE, LFENCE, x86 memory barrier, memory fence instruction
Virtual Reality, Augmented Reality, Digital Worlds, Social VR
Binary Serialization, Compact Format, JSON Alternative, Wire Format
cache coherence, MESI, MOESI, cache line invalidation, snooping
Hash Trees, Data Verification, Distributed Systems, Replication
kswapd, LRU eviction, page reclaim, memory pressure, OOM killer
Allocation, Performance, Object Reuse, Garbage Collection
Arena Allocation, Object Pooling, Garbage Collection, Memory Reuse
overcommit_memory, OOM killer, memory overcommit ratio, vm.overcommit
Shared Memory IPC, Lock-Free Queues, Producer-Consumer, Memory Barriers
mmap, memory-mapped I/O, virtual memory, file mapping
Consistency Models, Ordering Guarantees, Atomic Operations, Concurrent Reads