Semiconductor Engineering semiengineering.com

HBM4 Sticks With Microbumps, Postponing Hybrid Bonding

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High-Throughput Image Sensors: Smart Testing Powers Progress

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Ultralow-Loss PIC Platform From Violet to Near-Infrared, CMOS-Foundry Compatible (Caltech, UCSB et al.)

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Doping-Dependent Charge Trapping in WS2 FETs (KU Leuven, imec, TU Wien)

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Minimizing Optical Loss While Enabling Efficient Phase Modulation in TMD-Based Devices (Nanyang Technological Univ., et al.)

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Performant Side-Channel Resistant RISC-V Core to Secure Neural Network Inference (Northeastern Univ.)

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Improving End-to-End Cyber Threat Detection with Quantum Processors Through Hybrid Architecture (Johns Hopkins Univ.)

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Chip Industry Technical Paper Roundup: Jan 12

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Data Centers Need High Reliability Semiconductors

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Research Bits: Jan. 12

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Four Architectural Opportunities for LLM Inference Hardware (Google)

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Chip Industry Week in Review

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Aging Aware Steepening Metric for the Fault Coverage of a Test Set (Purdue Univ.)

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Navigating FIPS 140-3

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Airbus A320 Recall: Rethinking Fault Testing In Aerospace

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All Models Are Wrong, But Some Are Useful: Lessons From Everyday Life

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Securing Terabit Ethernet Networks With 1.6T MACsec Security Modules

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Ensure Equivalence Of Synthesizable C++/SystemC Designs Against Generated/Handwritten RTL

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Is End-To-End Security Possible?

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Automotive Outlook: 2026

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