Semiconductor Engineering semiengineering.com

Replacing GPU Compute Dies With PNM-Enabled HBM Cubes For Long-Context Decode Attention (UCSD, Columbia, Yonsei U., NVIDIA, Samsung)

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Understanding Why Drain-Current in GAAFETs Deviates from Thermionic Dependence at Negative Gate Voltages (Sandia National Lab, LIST)

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Chip Industry Technical Paper Roundup: May 5

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Research Bits: May 5

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From Simulation Checkpoints To Continuous Physics

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Designing Chips In The Context Of Rapidly Evolving AI

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Potential Route To Photonic FPCA Using NV Low-Loss Phase Change Material (Oxford)

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Chip Industry Week in Review

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Transforming DRC Closure At Advanced Nodes

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Creating Agentic EDA Methodologies

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Foundry Capacity Is Limiting Who Competes At Leading Edge Nodes

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Unlocking High-Speed Serial Link Signal Integrity With AMI Model

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Facilitating Complex SoC Design Through Automation And Integration

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Solving Clock Signal Integrity And Jitter Issues

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From Standards To Systems: The Chiplet Era On Arm

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NoC Coherency Challenges Balloon With AI SoCs And Chiplets

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Energy-Efficient Liquid Cooling for Advanced Semiconductor Packaging (KAIST)

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Assuring Comprehensive Security Coverage In Hardware Design

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How Long Will CAN Stick Around As Rival Networks Speed Up?

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Blog Review: Apr. 29

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