CPU Cache-Friendly Data Structures in Go: 10x Speed with Same Algorithm
skoredin.pro·9h·
Discuss: Hacker News
Cache Optimization
Rigorous Evaluation of Microarchitectural Side-Channels with Statistical Model Checking
arxiv.org·11h
📱Bytecode Design
The Best Performance Optimization Is Sometimes Changing Your Architecture
reddit.com·1d·
Discuss: r/webdev
🚀Code Motion
A Primer on Memory Consistency and Cache Coherence, Second Edition
link.springer.com·22h·
Discuss: r/programming
🧠Memory Models
Intel Details Core Options for "Nova Lake" and "Diamond Rapids" Xeon 7 Processors
techpowerup.com·3d
Instruction Fusion
Advanced Vulkan Rendering: Building a Modern Frame Graph and Memory Management System
dev.to·3h·
Discuss: DEV
🌊Dataflow Languages
Beyond Von Neumann: Toward a unified deterministic architecture
venturebeat.com·1d
🤝Cooperative Threading
Measuring Reorder Buffer Capacity
blog.stuffedcow.net·3d·
📝Register Allocation
Optimizing queries by using observability
infoworld.com·3h
📈Query Optimization
Predictive Coding Light
nature.com·15h
🗺️Region Inference
Highly concurrent in-memory counter in GoLang
engineering.grab.com·15h
🧠Memory Models
Understanding the KV Cache (feat. Self-Attention)
dev.to·8h·
Discuss: DEV
🔄Subinterpreters
Achieving 1.2 TB/s Aggregate Bandwidth by Optimizing Distributed Cache Network
juicefs.com·22h·
Discuss: Hacker News
🌍HTTP Servers
Processor stuck on 0.54ghz
i.redd.it·1d·
Discuss: r/computers
🔮Branch Predictors
Inside the Chiplet Revolution: How Arm’s Compute Subsystems Platform is Democratizing Custom AI Silicon
newsroom.arm.com·47m
💾Allocator Design
Why We Need SIMD
parallelprogrammer.substack.com·12h·
Discuss: Substack
🔀SIMD Programming
ROCm/TheRock
github.com·13h
🔄Cross-Compilation
An old Xeon may use a lot of power, but it's not as slow as you might think
xda-developers.com·23h
⏲️Embedded GC
AI Under the Hood Part I: Understanding the Machine
kennethwolters.com·3d·
Discuss: Hacker News
🖥️Lisp Machines