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💾 Cache Algorithms
LRU, Cache Coherence, Memory Hierarchy, Performance
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122477
posts in
2.56
s
How We Built the Fastest
Kimi
K2.5
on Artificial Analysis
baseten.co
·
1d
·
Discuss:
Hacker News
🌪️
V8 TurboFan
EDM
: An Ultra-Low Latency Ethernet Fabric for Memory
Disaggregation
danglingpointers.substack.com
·
2d
·
Discuss:
Substack
🌱
Green Threads
Designing and Using
Combinators
: The
Essence
of Functional Programming
cse.chalmers.se
·
2d
·
Discuss:
Hacker News
⚡
functional programming
The
Lazy
Builder
’s Complexity Lesson
artima.com
·
4d
🌳
Tree Walking
Parallel Track Transformers:
Enabling
Fast GPU Inference with Reduced
Synchronization
machinelearning.apple.com
·
2d
🗺️
Region Inference
Measure
Twice
, Prompt Once
ignasibosch.com
·
1d
·
Discuss:
DEV
🔬
Nanopasses
AMD
Medusa
Halo With Up To 24 Cores May Use
LPDDR6
For Huge Bandwidth Gains
hothardware.com
·
1d
🔧
RISC-V
Six
Weeks
of
Molting
artlu.bearblog.dev
·
2d
🏗️
Cranelift
What does
RCU
_
Lazy
do?
wiki.cachyos.org
·
4d
·
Discuss:
r/cachyos
📊
perf Tools
Programming
Aphorisms
matklad.github.io
·
1d
·
Discuss:
Lobsters
,
Hacker News
,
Hacker News
🪄
C Metaprogramming
An introduction to
lockless
algorithms [
LWN.net
]
lwn.net
·
3d
🎯
Ring Buffers
Grouped
Blockscaled
Gemm
veitner.bearblog.dev
·
4d
🗺️
Region Polymorphism
AMD's 3D
V-Cache
is still the best gaming upgrade money can buy
xda-developers.com
·
19h
⚡
Cache Optimization
Comparing
3ba35f7a43
..
.37132ea456
github.com
·
5h
🧩
Constraint Solvers
Chiplets
And
3D-ICs
Add New Electrical And Mechanical Challenges
semiengineering.com
·
10h
🔌
Microcontrollers
Weight-Sparse Circuits May Be
Interpretable
Yet
Unfaithful
lesswrong.com
·
2d
🗺️
Region Inference
How
JVM
Thread
Scheduling
Impacts Application Performance
dev.to
·
15h
·
Discuss:
DEV
⏱️
Async Runtimes
JMigBench
: A Benchmark for
Evaluating
LLMs on Source Code Migration (Java 8 to Java 11)
arxiv.org
·
1d
🚚
Code Migration
How To Go
Slow
artima.com
·
4d
⏭️
Skip Lists
Performance
Tip
of the Week #79: Make at most one
tradeoff
at a time
abseil.io
·
4d
⚡
Cache Optimization
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