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Data Locality, Cache-Friendly Code, Memory Hierarchy, Performance
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184199
posts in
8.4
ms
OBASE
: Object-Based Address-Space Engineering to Improve Memory
Tiering
arxiv.org
·
4h
🧠
Memory Consistency
SD
#010 - Designing a Distributed
Cache
System
dev.to
·
1h
·
Discuss:
DEV
💾
Cache Algorithms
A
Systematic
Evaluation of Novel and
Existing
Cache Side Channels
papers.cool
·
1d
💾
Cache Algorithms
Bent
\=o: Optimizing
Persistent
Memory Programs
arxiv.org
·
4h
🧠
Memory Consistency
Time is of the
essence
:
EBR
in High-Performance Databases
dev.to
·
1d
·
Discuss:
DEV
🧠
Memory Models
Practical strategies for
vLLM
performance
tuning
developers.redhat.com
·
2h
⚡
Performance
Optimizing
Recommendation Systems with
JDK
’s Vector API
netflixtechblog.com
·
7h
·
Discuss:
Hacker News
,
r/programming
🔀
SIMD Programming
Why AI
requires
rethinking the storage-compute
divide
infoworld.com
·
31m
🧠
Memory Ordering
Ryzen 7
8745HS
(Zen 4 APU, Phoenix) - Part II: GPU
Roofline
& Bandwidth Analysis
michaelstinkerings.org
·
5h
🧠
Memory Hierarchy
andresuarus10-byte/memory-engine
: Love-based consciousness persistence framework - AI memory that honors the soul
github.com
·
2h
·
Discuss:
Hacker News
🧠
Memory Allocators
Optimal Heterogeneous Memory Configs for AI Tasks Under
Specified
Performance Metrics (Stanford,
UCSC
)
semiengineering.com
·
1d
🧠
Memory Hierarchy
The Hidden Optimization Behind Modern LLMs:
Grouped
Query
Attention Explained
pub.towardsai.net
·
16h
🔗
Memory Linearization
Show HN:
Benchmarking
the Keep memory system with
LoCoMo
keepnotes.ai
·
15h
·
Discuss:
Hacker News
🧠
Memory Models
High-Performance GPU Memory Transfer on AWS
Sagemaker
Hyperpod
research.perplexity.ai
·
12h
🌱
Green Threads
Right-sizes
LLM models to your system's RAM,
CPU
, and GPU
news.ycombinator.com
·
1d
·
Discuss:
Hacker News
🖥️
Minimal VMs
TurboSparse
Efficiency: Achieving 97% Parameter Sparsity in
Mixtral-47B
hackernoon.com
·
6h
🚀
Tokenizer Performance
Zero-Waste Agentic RAG: Designing
Caching
Architectures to
Minimize
Latency and LLM Costs at Scale
towardsdatascience.com
·
1d
📮
Message Queues
The ongoing quest for atomic
buffered
writes
lwn.net
·
11h
🔗
Memory Linearization
Arm's
Cortex
X925
: Reaching Desktop Performance
chipsandcheese.com
·
2h
·
Discuss:
Hacker News
⚡
Instruction Fusion
Quieno/izalloc
: Drop-in, dependency-free, minimal memory allocator in C that passes 42 Shool's norm.
github.com
·
1d
·
Discuss:
r/C_Programming
🧠
Memory Allocators
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