Skip to main content
Scour
Browse
Getting Started
Login
Sign Up
You are offline. Trying to reconnect...
Copied to clipboard
Unable to share or copy to clipboard
⚡ Cache Optimization
Data Locality, Cache-Friendly Code, Memory Hierarchy, Performance
Filter Results
Timeframe
Fresh
Past Hour
Today
This Week
This Month
Feeds to Scour
Subscribed
All
Scoured
145
posts in
11.6
ms
NaturalIO/embed-collections-rs:
Cache
aware
and
mem
efficient data structures for rust. Trait based intrusive collection and smart pointers
🔒
Rust Borrowing
github.com
·
3d
·
r/rust
SICP: An Architectural Trace of Pointer Chasing and Environment Retention on Modern Silicon
📊
Memory Profilers
khola.blog
·
2d
·
Hacker News
Open-Source z386 Brings Intel 80386 Microcode Back to Life
⚡
Instruction Fusion
linuxiac.com
·
17h
The Lies Your Microbenchmarks Tell You: A JMH Field Guide for Backend Engineers
⚡
JIT Optimizations
javacodegeeks.com
·
1h
z386: An Open-Source 80386 Built Around Original Microcode
📱
Bytecode Design
nand2mario.github.io
·
1d
·
Lobsters
,
Hacker News
Four-Tier
Memory
Hierarchy
for LLM Reasoning (USC, UW)
🧠
Memory Ordering
semiengineering.com
·
4d
Newspaper-style front page for Hacker News
🔄
Bootstrapping
thefrontpage.dev
·
16h
·
Hacker News
High Speed Networking: The View from the Machine
🏰
Capability Machines
blog.c21-mac.com
·
2d
·
r/programming
The Very Exciting
Cache
Aware
Scheduling Looks Like It Will Land For
Linux
7.2
🧠
Memory Hierarchy
phoronix.com
·
4d
·
Hacker News
Latency Numbers Every Engineer Should Know
⚡
Performance
siliconopera.com
·
15h
AMD confirms production ramp of its EPYC 'Venice' server CPUs on TSMC's 2nm process
🏗️
CPU Architecture
tweaktown.com
·
2d
Merge Sort vs Quick Sort:
Cache
& Pivot Benchmark Results
💾
Cache-Oblivious Algorithms
tildalice.io
·
5d
GEEKOM A9 Max 2026 Edition review: benchmarked with 64GB of dual-channel DDR5
📊
perf Tools
neowin.net
·
1d
kjkrol/goke:
High-performance
, zero-allocation ECS for Go.
Cache-friendly
data orchestrator with type-safe iterators.
🤖
Embedded Go
github.com
·
7h
·
r/golang
How
data
movement defines
performance
for AI silicon
🔌
Microcontrollers
edn.com
·
4d
Seagate is hosting a webinar to teach you all about NAS
📁
File Systems
kitguru.net
·
2d
Inside SambaNova's Inference Architecture
🗺️
Region Inference
viksnewsletter.com
·
4d
Leaving
performance
on the table
🏃
Escape Analysis
fzakaria.com
·
1d
$100
CPU
Shootout: Comparing the Ryzen 5 5500, Core i3-14100F, and Core i3-12100F to find the top DDR4
CPU
📊
Profiling Tools
tomshardware.com
·
1d
·
Hacker News
,
r/hardware
AMD EPYC 8005 Sorano CPUs Skip Zen 5c for up to 84 Full Zen 5 Cores
🏗️
CPU Architecture
hothardware.com
·
4d
Page 2 »
Log in to enable infinite scrolling
Keyboard Shortcuts
Navigation
Next / previous item
j
/
k
Open post
o
or
Enter
Preview post
v
Post Actions
Love post
a
Like post
l
Dislike post
d
Undo reaction
u
Save / unsave
s
Recommendations
Add interest / feed
Enter
Not interested
x
Go to
Home
g
h
Interests
g
i
Feeds
g
f
Likes
g
l
History
g
y
Changelog
g
c
Settings
g
s
Browse
g
b
Search
/
Pagination
Next page
n
Previous page
p
General
Show this help
?
Submit feedback
!
Close modal / unfocus
Esc
Press
?
anytime to show this help