🔁 Cache Coherence - hello · Scour

Show HN: How Scaleway brought the first RISC-V servers to the cloud ⚡RISC-V

scaleway.com·4h·Hacker News

KDE Plasma 6.7 To Provide A Much Better Experience For CPU-Based Rendering 🎮WebGPU

phoronix.com·5d·Hacker News

April in TigerLand 🐅TigerBeetle Protocol

TigerBeetle Blog via kill-the-newsletter.com·51m

PLUR: Persistent memory for AI agents. Local-first, zero-cost 🧩mimalloc

github.com·4d·Hacker News

What Actually Happens Inside a CPU When Code Runs ⚙️CPU Microarchitecture

siliconopera.com·2d

MinIO adds petabyte-scale MemKV cache for Nvidia GPU inference 💽NVMe

blocksandfiles.com·4h·Hacker News

Prompt caching but for RL – 7.5x speedup on long-prompt/short-response workloads 💬Prompt Engineering

castform.com·19h·Hacker News

Virtual Memory: A Deep Dive into Page Tables, TLBs, and Linux Internals 💭Virtual Memory

blog.codingconfessions.com·1d

Micron Redefines AI Performance With Sampling of 256GB DDR5 Server Module 🏗️NUMA

cdrinfo.com·1h

Memory Chips May No Longer Be In Just A Commodity Cycle 🔄Hardware Transactional Memory

seekingalpha.com

·21h

Position: AI Security Policy Should Target Systems, Not Models 🛡️AI Security

Is 3-Bit KV Cache the Holy Grail? A Reality Check on Google’s TurboQuant 🌊Memory Bandwidth

pub.towardsai.net

·2d

LSM Trees: Why Your Database Writes Are Fast and Your Reads Are Lying to You 🌲LSM Trees

dev.to·1d·DEV

How CPU Memory and Caches Work [video] 🧠Memory Management

youtube.com·2d·Hacker News

Why does AI memory fail at connecting facts? I ran the benchmarks to find out 🔄Memory Ordering

yourmemoryai.xyz·2d·Hacker News, r/SideProject

The Case For Compilers: A Look at SPEC CPU 2026 on LLVM 22 📊Profile-Guided Optimization

servethehome.com·2d

Cache Use Cases Explained: Latency Cache vs. Capacity Cache 💾Cache Design

read.thecoder.cafe·5d·r/SoftwareEngineering, r/coding

Memory godboxes could offer relief from the RAMpocalypse 🔌CXL

theregister.com·2d·Hacker News

The SiFive P570 Gen 3: A System Perspective 📡Intel PMT

sifive.com·2h·Hacker News

t\"{a}k\={o}Formal: Enabling Robust Software for Programmable Memory Hierarchies (Extended Version) 🚧Memory Barriers

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