LLMs on a Shoestring: The Dynamic Cache Advantage by Arvind Sundararajan
dev.to·6h·
Discuss: DEV
💨Cache Optimization
The future of microoptimization
goldenstack.net·2d·
Discuss: Hacker News
🧮Compute Optimization
Semantic Dictionary Encoding
falvotech.com·1h·
Discuss: Hacker News
🌀Brotli Dictionary
Topological Sort: Managing Mutable Structures in Haskell
mmhaskell.com·7h
🔗Topological Sorting
A Breadboard Computer in Three Chips
hackaday.com·2d
🖥️Hardware Architecture
Review: SpikingBrain Technical Spiking Brain-Inspired Large Models
arxiviq.substack.com·2d·
Discuss: Substack
🖥️Hardware Architecture
What is Algebraic about Algebraic Effects?
interjectedfuture.com·14m
Algebraic Effects
SK Hynix manufactures HBM4 stacks with over 2 TByte/s in series production
heise.de·21h
Nordic Processors
Back from Open Source Summit Europe 2025: talks from Bootlin
bootlin.com·6h
⚙️Operating System Design
Writing an operating system kernel from scratch
popovicu.com·1d·
⚙️Operating System Design
LAVa: Layer-wise KV Cache Eviction with Dynamic Budget Allocation
arxiv.org·12h
💻Local LLMs
Microservices vs Monolith: A Complete Architecture Guide for Modern Software Development
blog.devops.dev·1h
🖥️Self-hosted Infrastructure
Spike Timing: The Brain's Secret Weapon for Lightning-Fast Routing Now in AI by Arvind Sundararajan
dev.to·1h·
Discuss: DEV
🖥️Hardware Architecture
H100 PCIe – 1.86 TB/s memcpy roofline and 8× uplift
news.ycombinator.com·1d·
Discuss: Hacker News
Cache Coherence
Ubuntu 25.10's Rust Coreutils Transition Has Uncovered Performance Shortcomings
phoronix.com·4h
🔩Systems Programming
486Tang – 486 on a credit-card-sized FPGA board
nand2mario.github.io·2d·
Discuss: Hacker News
Homebrew CPUs
Disaggregated Inference at Scale with PyTorch and VLLM
pytorch.org·1d·
Discuss: Hacker News
LZ4 Streaming
Balance between refactoring and inheritance in your code
github.com·4h·
Discuss: Hacker News
Format Verification
A Lisp compiler to ARM written in Lisp (2)
forum.ulisp.com·3h·
Discuss: Hacker News
🔗Lisp