How is Ultrassembler so fast?
jghuff.com·49m·
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⚙️RISC-V Microcode
System Performance of Edge AI Applications is Beyond Models
dev.to·23h·
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📊Performance Profiling
Condor's Cuzco RISC-V Core at Hot Chips 2025
old.chipsandcheese.com·1d·
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⚙️RISC-V Microcode
Shooting Gallery: Touring the MSX1’s Capabilities
bumbershootsoft.wordpress.com·23h
🕹️Retro Gaming
Abstract Machine Models Also: what Rust got particularly right
dr-knz.net·16h·
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🔩Systems Programming
Google Summer of Code 2025 Reports: Asynchronous I/O Framework
blog.netbsd.org·1d
🔩Systems Programming
LongCat-Flash, a language model with 560B total parameters, MoE architecture
github.com·16h·
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📊Count-Min Sketch
The Latest Projects from Cornell’s ECE 4760/5730
hackaday.com·13h
⚡Circuit Design
Why AI Alone Fails at Large-Scale Code Modernization
thenewstack.io·1d
🔄Language Evolution
NXP MCX A34 mixed-signal Cortex-M33 MCU delivers 17x faster math acceleration for motor control and HVAC systems
cnx-software.com·2d
🔌Microcontrollers
Condor’s Cuzco RISC-V Core at Hot Chips 2025
chipsandcheese.com·2d·
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⚡CPU Microarchitecture
Benchmarking compression programs
maskray.me·11h
📦Deflate
Solving the compute crisis with physics-based ASICs
arxiviq.substack.com·1h·
Discuss: Substack
🕹️Hardware Emulation
Bootstrapping a Forth for Art
tia.mat.br·20h·
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🔗Concatenative Programming
Cole's Nerd-stuff Blog: Reverse Engineering the AY-3-8500, part 1: Demystifying the Pins
nerdstuffbycole.blogspot.com·14h
⚡Circuit Archaeology
How GPUs Organize Work: Or What are GPU Warps
dev.to·1h·
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🖥️Terminal Renaissance
Maker News – August 2025 Update
makernews.substack.com·7h·
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⚙️DIY Electronics
Sudokoo Proteus 360 AIO Review: a great first effort, with chart-topping noise-normalized performance
tomshardware.com·1d
⚡CPU Microarchitecture
CPU Branch Prediction – Earliest Forms of Machine Learning
medium.com·4d·
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⚡CPU Microarchitecture
Matrix Multiplication on Nvidia's Blackwell: Part 1 – Introduction
modular.com·1d·
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⚡SIMD Optimization