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🏗 Computer Architecture
RISC-V, Pipelining, Cache Optimization, Microcode
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184356
posts in
34.2
ms
Microarchitectural
Co-Optimization for Sustained Throughput of RISC-V Multi-Lane
Chaining
Vector Processors
⚙️
CPU Microarchitecture
arxiv.org
·
3d
RISC-V
becomes
AI hardware’s open foundation
⚙
Risc-v
jonpeddie.com
·
1d
Forlinx
UP4
– A 40×40 mm LCC + LGA system-on-module family with Rockchip, NXP, and Allwinner CPU options
🧩
RISC-V
cnx-software.com
·
7h
What it takes to
transpose
a
matrix
(2024)
⚡
SIMD Optimization
gudok.xyz
·
16h
·
Lobsters
,
Hacker News
Microarchitecture
Tailored to 3D-Stacked Near-Memory Processing LLM Decoding (U. of
Edinburg
, Peking U., Cambridge et al.)
🔁
Cache Coherence
semiengineering.com
·
2d
When Data Movement Becomes the
Bottleneck
in Modern
Workloads
: Compute-in-Transit as an Architectural Model
📡
Edge Computing
eprint.iacr.org
·
6d
openRuyi
— A Linux Distribution for
RISC-V
⚙
Risc-v
lemmy.ml
·
1d
Building a browser
VDJ
deck with AI: 97% prompt cache rate, $
1.2k
in API spend
🎚️
Audio Codecs
slerp.audio
·
1d
·
Hacker News
Your
CPU
Has More
Registers
Than You'd Think
⚙️
CPU Microarchitecture
fp32.org
·
6d
·
Lobsters
,
Hacker News
You don't need an
expensive
GPU to run a local LLM that actually works
💻
Local LLMs
xda-developers.com
·
1d
High AI performance: New
RISC-V
SBC
is a powerful Raspberry Pi 5 alternative
🔌
Single Board PC
notebookcheck.net
·
4d
Block
Interleaving
⚙️
CPU Microarchitecture
computerenhance.com
·
1d
RightNow-AI/picolm
: Run a 1-billion parameter LLM on a $10 board with 256MB RAM
🏗️
AI Infrastructure
github.com
·
2d
Banana Pi and
Radxa
introduce tiny
RISC-V
computers with up to 60 TOPS of AI performance
🧩
RISC-V
liliputing.com
·
6d
Deep
Moats
and Platform
Shifts
in Computing
⚙
Risc-v
semiconductor.substack.com
·
4d
·
Substack
AMMA
: A
Multi-Chiplet
Memory-Centric Architecture for Low-Latency 1M Context Attention Serving
🧠
Neuromorphic Chips
arxiv.org
·
13h
An AI agent just designed a complete
RISC-V
CPU from
scratch
in 12 hours
⚙
Risc-v
techspot.com
·
6d
Niek-Kamer/zkmcu
: no_std Rust
Groth16/BN254
verifier for microcontrollers. Cortex-M33 + RISC-V Hazard3. ~1 s verify on a $7 RP2350.
🔌
Embedded Rust
github.com
·
5d
·
r/rust
Banana
Pi gives
RISC-V
an edge AI board for large local LLMs
🧩
RISC-V
jonpeddie.com
·
2d
Cloudflare
Optimizes
Edge Stack for High-Core
CPUs
Instead of Large Cache
☁️
Cloudflare Workers
infoq.com
·
5d
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