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⚡ RISC-V
Specific
Open ISA, Instruction Set, Custom Extensions, FPGA
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185409
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ms
We Created a Single Source for All
RISC-V
Specifications
📏
Picolibc
riscv.org
·
5d
Show HN: How
Scaleway
brought the first
RISC-V
servers to the cloud
🏗
Computer Architecture
scaleway.com
·
10h
·
Hacker News
Building 32-bit RISC-V
sysroots
and images with
Yocto
🏗️
Build Systems
muxup.com
·
1d
A
Reconfigurable
Multiplier
Architecture for Error-Resilient Applications in RISC-V Core
🎲
Hardware Branch Prediction
arxiv.org
·
18h
RVA23-compliant
K3 Pico-ITX SBC and
K3-CoM260
SoM feature SpacemiT K3 octa-core RISC-V AI SoC, up to 32GB RAM, 256GB UFS
⚡
Intel TSX
cnx-software.com
·
1d
Milk-V
Jupiter2
is mini PC with a
SpacemiT
K3 RISC-V processor
🥧
Raspberry Pi
liliputing.com
·
5h
[Summer 2026
LFX
] RISC-V HPC & ML Software Ecosystem: Port, Validate & Automate
LFX
Mentorship Proposal | 12-Week Plan · Issue #4 ·
clusterchallenge/Hardware-Abstraction-Layer-Transitional-Libraries
🚀
Performance
github.com
·
6d
·
r/opensource
Milk-V
Jupiter2
brings
SpacemiT
K3 RISC-V platform to Pico-ITX form factor
⚡
Intel DDIO
linuxgizmos.com
·
17h
Pico
to
alchrity
cu 8 bit high speed parallel interface
🎛️
Microcontrollers
hackster.io
·
2d
Inside the
SiFive
Performance™
P570
Gen 3: High Performance Efficiency for Next-Generation Consumer and Commercial Applications
🏗
Computer Architecture
sifive.com
·
8h
·
Hacker News
SpacemiT
K3
integrates 8-core RISC-V CPU cluster and 60 TOPS AI engine
🔢
Intel AMX
lxer.com
·
1d
Sipeed
Crams 32GB
LPDDR5
and a 60 TOPS NPU Into a Compact RISC-V Board That Hits 15 Tokens/s on Qwen-3.5 35B AI LLMs
⚡
Hardware Acceleration
wccftech.com
·
8h
Getting peak TOPS on a
Ryzen
AI 7 350
NPU
⚡
Hardware Acceleration
destevez.net
·
4d
·
Lobsters
,
Hacker News
Raspberry Pi
CM5
IoT
In C
🎛️
Microcontrollers
i-programmer.info
·
6h
The Explorer Board a $99 Artix
UltraScale
+ FPGA Board from
Adiuvo
🔐
Hardware Security
explorerboard.tech
·
3d
·
Hacker News
Field-programmable
gate
array
🔌
FPGA Programming
en.wikipedia.org
·
6d
Sipeed launches K3 Pico-ITX and
CoM260
boards with
SpacemiT
RISC-V SoC
🎛️
SmartNICs
linuxgizmos.com
·
2d
·
r/SBCs
Hardware
Memory Models (Memory Models, Part 1)
🧠
Memory Models
research.swtch.com
·
4d
·
Hacker News
SiFive introduces
RVA23-compliant
Performance
P570
Gen3 RISC-V core for consumer and AIoT applications
🏗
Computer Architecture
cnx-software.com
·
9h
It’s an Apple
Lisa
, on a
FPGA
🎛️
Microcontrollers
hackaday.com
·
3d
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